One type of prior EPROM is the flash electrically erasable and programmable read-only memory ("flash EPROM"). The flash EPROM can be programmed by a user, and once programmed, the flash EPROM retains its data until erased. Once programmed, the contents of the flash EPROM can be erased by electrical erasure. The flash EPROM may then be reprogrammed with new code or data.
When a computer system to which a prior flash EPROM is coupled goes through a power up or power down transition, the system level signals such as the power supply voltage V.sub.CC or the program/erase voltage V.sub.PP are typically not guaranteed to be valid. This means that the potential level of the V.sub.CC voltage or the V.sub.PP voltage may be below a minimum operation voltage required for the prior flash EPROM during power up or power down transitions. The invalid V.sub.CC or V.sub.PP signals may cause circuitry of the prior flash EPROM to malfunction and may result in data corruption or physical damage to the prior flash EPROM is typically a result of over-erasing or over-programming. An over-erasing condition arises because too much charge is removed from the floating gate, making the flash EPROM "depletion-like."
One prior art circuit locks out the circuitry of the prior flash EPROM when the system level signals are not valid so as to prevent false operations on the prior flash EPROM. That prior art circuit is referred to in U.S. Pat. No. 4,975,883, issued Dec. 4, 1990, and entitled METHOD AND APPARATUS FOR PREVENTING THE ERASURE AND PROGRAMMING OF A NONVOLATILE MEMORY. That prior art circuit includes a reference voltage generation circuit and a comparator circuit. The reference voltage generation circuit generates a reference voltage that corresponds to the minimum operation voltage required for the prior flash EPROM. The power supply voltage V.sub.CC is then compared in the comparator circuit with the reference voltage. If the voltage level of the power supply voltage V.sub.CC is not above that of the reference voltage, the comparator circuit outputs a signal that forces the prior flash EPROM into a read mode.
One disadvantage associated with this prior art circuit is that the circuit typically requires the power supply voltage V.sub.CC to be higher than 3 volts. Given that three or more transistors are typically connected together in one branch, this prior art circuit cannot typically function properly when the power supply V.sub.CC voltage is below 3 volts. This means that the prior art circuit typically is not used in a 3 volt power supply environment. This drawback is not trivial given that many laptop computers employ a 3 volt power supply.
Another disadvantage associated with this prior art circuit is that it employs a relatively large number of transistors. Thus, the prior art circuit is relatively complex and it occupies a relatively large amount of space on a substrate.
In addition, the prior art circuit also consumes a relatively large amount of power because of the relatively large number of transistors. Power consumption in a computer system is exceptionally critical when the computer system is a battery-powered portable unit, such as a laptop computer. It is typically desirable that a portable computer system consume a minimum amount of power in order to prolong battery life.